In a high-frequency circuit used in a wireless communication circuit, an electronic circuit adapted for switching the signal paths and gain therein is required. FIG. 10 shows a block diagram of a high-frequency transmission/reception unit arranged in general mobile wireless equipment. There is used an electronic circuit for switching signal paths of a high-frequency signal in a transmission/reception antenna switch 102 and in a transmission/reception oscillator switch 112, and also an electronic circuit for varying the circuit property and gain is used in part of a low noise amplifier 103, an intermediate frequency amplifier 106, a driver amplifier 110, and a transmission amplifier 111. Hereinafter, as examples of conventional electronic circuits, two high-frequency switches and one gain-variable amplifier will be described.
FIG. 11 shows an exemplified configuration of the conventional electronic circuit constituting a high-frequency switch (refer to Jpn. Pat. Laid-Open Publication No. 2000-278109, FIG. 1). In this electronic circuit, a transistor QI and a transistor QO are cascode-connected, and the base of the transistor QI is supplied with a high-frequency input signal from an input terminal IN. The transistor QO has its base connected to a capacitor C1 for grounding the transistor with high frequency and a control signal terminal CTL. When the transistor QO is turned on or off by a signal from the control signal terminal CTL, a high-frequency signal output from a signal output terminal OUT is varied.
FIG. 13 shows an exemplified configuration of the conventional electronic circuit constituting a high-frequency switch (refer to Jpn. Pat. Laid-Open Publication No. 9-121119, FIG. 1). In this electronic circuit, a transistor QI has its collector cascode-connected to emitter-connected transistors QO1 and QO2, and the base of the transistor QI is supplied with a high-frequency input signal from an input terminal IN. The transistors QO1 and QO2 have their bases connected to capacitors C1 and C2 for grounding the transistors with high frequency and switches SW1 and SW2 for switching the on/off of the transistors QO1 and QO2, respectively. When the switches SW1 and SW2 are switched, signal output terminals OUT1 and OUT2 are switched.
FIG. 14 shows an exemplified configuration of the conventional electronic circuit constituting a gain-variable amplifier (refer to Jpn. Pat. Laid-Open Publication No. 2002-151983, FIG. 1). In this electronic circuit, a cascode amplifier including a transistor QI1 that has its source grounded and a transistor QO1 that has its base grounded through a capacitor C1, and a cascode amplifier including a transistor QI2 that has its source grounded and a transistor QO2 that has its base grounded through a capacitor C2 are arranged in parallel, and the transistor QI2 has its gate connected to the drain of the transistor QIO through a capacitor C3. The gate of the transistor QI1 is supplied with a high-frequency input signal from an input terminal IN. When the biases of the transistor QO1 and transistor QO2 are controlled by a control power source Vc connected through resistors R1 and R3, gains of the cascode amplifiers are controlled.
The techniques as described above are common in controlling the bias of the base of a base-grounded or gate-grounded transistor, which is grounded through a capacitor, of a cascode amplifier so as to switch the circuit performance and signal paths.
In the conventional electronic circuits in which the bias of the base of a base-grounded or gate-grounded transistor, which is grounded through a capacitor, of a cascode amplifier is controlled so as to switch the circuit performance and signal paths, there is a raised problem that the switching time is delayed because it takes time to charge or discharge grounded capacitors.
For example, in an electronic circuit shown in FIG. 12 which includes the conventional switch shown in FIG. 11 and a control circuit having a transistor QC, resistors R2 and R3, when turning on the transistor QO, the capacitor C1 is charged by a power source Vcc2 through a resistor R1. It is assumed here that the charging voltage of the capacitor C1 when the switch is off is V0, the voltage between the collector and emitter when the transistor QI is turned on is VCEQI, the voltage between the base and emitter when the transistor QO is turned on is VBEQO, and the base current until the transistor QO is turned on is sufficiently small. Time required for the switch to be turned on from off is equal to time required for the charging voltage VC1 of the capacitor C1 to be charged to VCEQI+VBEQO from V0.
The charging voltage VC1 at time “t” after the control circuit is switched is represented by the following expression 1:VC1(t)=(V0−Vcc2)exp{−t/(R1·C1)}+Vcc2  (1)That is, the switching time from off to on significantly depends on a time constant of the resistor R1 and capacitor C1.
FIG. 16 shows a graph indicative of the relation between the charging voltage VC1 and time “t” which is obtained when the R1 is 10 kO, C1 is 10 pF, Vcc2 is 3.0 V, V0 is 0.2 V, VCEQI is 0.6 V, and VBEQO is 1.2 V. It is to be noted that the switching time required to get to the state of VC1(t)>VCEQI+VBEQO is 77 ns. The switching time from off to on can be reduced by increasing the value of the resistor R2 to increase the charging voltage V0 at the time of off. On the other hand, since the switching time from on to off similarly depends on the time constant of the resistor R2 and capacitor C1, the switching time from on to off is undesirably increased.
It is an object of the present invention to provide an electronic circuit that can reduce the delay of the switching time due to the charging time of a grounded capacitor.